Descriptio
Familia Zynq® UltraScale+™ MPSoC fundatur in architectura Xilinx® UltraScale™ MPSoC.Haec familia productorum integrat plumam divitem 64 bits quad-core vel corticum Arm® Cortex®-A53 et cortex duplicale Brachium Cortex-R5F fundatum systema processus processus (PS) et logica programmabilis Xilinx (PL) Architectura UltraScale in a. uno artificio.Inclusa etiam sunt in- chip memoriae, multiporti memoriae externae interfacies, et copia connectivity peripheralium interfaces copiosae.
| Formularium: | |
| attributum | Precium |
| Categoria | Integrated Circuitus (IC) |
| Embedded - Systema In Chip (SoC) | |
| Mfr | Xilinx Inc. |
| Series | Zynq® UltraScale+™ MPSoC EG |
| sarcina | Tray |
| Pars Status | Active |
| Architecture | MCU, FPGA |
| Core Processor | Quad ARM® Cortex®-A53 MPCore™ cum CoreSight, Dual ARM® Cortex™-R5 cum CoreSight, ARM Mali-400 MP2 |
| Flash Size | - |
| RAM Location | 256KB |
| Peripherales | DMA, WDT |
| Connectivity | CANbus, EBI/EMI, Ethernet, I²C, MMC/SD/SDIO, SPI, UART/USART, USB OTG |
| Celeritas | 533MHz, 600MHz, 1.3GHz |
| Primaria attributa | Zynq®UltraScale+™ FPGA, 599K+ Logic Cellae |
| Operating Temperature | -40°C ~ 100°C (TJ) |
| Sarcina / Case | 1156-BBGA, FCBGA |
| Numerus I / O * | 328 |
| Basis Product Number | XCZU9 |